論文一覧(1996年度)
| 16 | 黒田忠広, "しきい値電圧可変技術とその応用," 日本工業技術センター, pp. 42-69, Jan. 1997. |
|
| 15 | 桜井貴康, 黒田忠広, "LSIの低消費電力化・高速化技術," 日本テクノセンター, pp. 1-44, Dec. 1996. |
|
| 14 | T. Kuroda, T. Fujita, S. Mita, T. Nagamatu, S. Yoshioka, K. Suzuki, F. Sano, M. Norishima, M. Murota, M. Kako, M. Kinugawa, M. Kakumu, and T. Sakurai, "A 0.9V 150MHz 10mW 4mm2 2-D discrete cosine transform core processor with variable-threshold-voltage scheme," IEEE Journal of Solid-State Circuits (JSSC), vol. 31, no. 11, pp. 1770-1779, Nov. 1996. |
|
| 13 | T. Sakurai and T. Kuroda, "Low-power circuit design for multimedia CMOS VLSI’s," in Proc. Synthesis and System Integration of Mixed Technologies (SASIMI’96), pp. 3-10, Nov. 1996. |
|
| 12 | T. Kuroda and T. Sakurai, "Threshold-Voltage Control Schemes through Substrate-Bias for Low-Power High-Speed CMOS LSI Designs," Journal of VLSI Signal Processors, vol. 13, no. 2/3, pp. 191-201, Aug. 1996. |
|
| 11 | T. Kuroda, T. Fujita, S. Mita, T. Mori, K. Matsuo, M. Kakumu, and T. Sakurai, "Substrate noise influence on circuit performance in variable threshold-voltage scheme," in Proc. IEEE International Symposium on Low Power Electronics and Design (ISLPED’96), pp. 309-312, Aug. 1996. |
|
| 10 | 黒田忠広, "低消費電力／高速CMOS回路設計手法," 日本工業技術センター, pp. 1-23, Aug. 1996. |
|
| 9 | 黒田忠広, "しきい値可変技術（VTCMOS）の回路技術と応用設計," 日本工業技術センター, pp. 24-44, Aug. 1996. |
|
| 8 | K. Suzuki, T. Kuroda, T. Fujita, S. Mita, T. Nagamatsu, S. Yoshioka, F. Sano, M. Norishima, M. Murota, M. Kako, M. Kinugawa, M. Kakumu, and T. Sakurai, "A 0.9V 150MHz 10mW 4mm2 2-D discrete cosine transform core processor with variable-threshold-voltage (VT) scheme," in Proc. 4th International Workshop on Advanced LSI’s, pp. 150-158, July 1996. |
|
| 7 | 桜井貴康, 黒田忠広, "マルチメディアLSIと低消費電力設計技術（招待）," 電気学会 第43回半導体専門講座, pp. 1-32, July 1996. |
|
| 6 | T. Kuroda, T. Fujita, M. Noda, Y. Itabashi, S. Kabumoto, T. S. Wong, D. Beeson, and D. Gray, "Capacitor-free level-sensitive active pull-down ECL circuit with self-adjusting driving capability," IEEE Journal of Solid-State Circuits (JSSC), vol. 31, no. 6, pp. 819-827, June 1996. |
|
| 5 | K. Seki, Y. Unekawa, K. Sakue, T. Nakano, S. Yoshida, T. Nagamatsu, H. Nakakita, Y. Kaneko, M. Motoyama, Y. Ohba, K. Ise, M. Ono, K. Fujikawara, Y. Miyazawa, T. Kuroda, Y. Kamatani, T. Sakurai, and A. Kanuma, "A 5Gb/s ATM Switch Element CMOS LSI Supporting 5 Quality-of-Service Classes with 200MHz LVDS Interface," Technical Report of IEICE, ED96-51, pp. 57-64, June 1996. |
|
| 4 | 藤田哲也, 黒田忠広, 三田真二, 永松 徹, 吉岡晋一, 佐野文彦, 法島政之, 室田雅之, 加古真琴, 衣川正明, 各務正一, 桜井貴康, "A 0.9V 150MHz 10mW 4mm2 2-D Discrete Cosine Transform Core Professor with Variable-Threshold-Voltage(VT) Scheme," 電子情報通信学会 集積回路研究会 信学技法, ED96-49/SDM96-32/ICD96-52, pp. 43-48, June 1996. |
|
| 3 | Transform Core Professor with Variable-Threshold-Voltage (VT) Scheme, 電子情報通信学会 集積回路研究会 信学技法, ED96-49/SDM96-32/ICD96-52, pp. 43-48, June 1996. |
|
| 2 | T. Kuroda, T. Fujita, T. Nagamatu, S. Yoshioka, T. Sei, K. Matsuo, Y. Hamura, T. Mori, M. Murota, M. Kakumu, and T. Sakurai, "A High-Speed Low-Power 0.3um CMOS Gate Array with Variable Threshold Voltage (VT) Scheme," in Proc. IEEE Custom Integrated Circuits Conference (CICC’96), pp. 53-56, May 1996. |
|
| 1 | 黒田忠広, "低消費電力化設計手法," 日本工業技術センター, pp. 1-29, May 1996. |
