論文一覧(2009年度)
| 40 | J. Nishimura, and T. Kuroda, "Versatile Recognition Using Haar-Like Feature and Cascaded Classifier," IEEE Sensors Journal, vol. 10, pp. 942-951, 2010. |
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| 39 | T. Takeya, and T. Kuroda, "MMSE Timing Recovery using Multi-Channel Early-Late Gates for Analog Multi-Tone Systems," 4th International Symposium on Communications, Control and Signal Processing (ISCCSP'10), Mar. 2010. |
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| 38 | N. Miura, K. Kasuga, M. Saito, and T. Kuroda, "An 8Tb/s 1pJ/b 0.8mm2/Tb/s QDR Inductive-Coupling Interface Between 65nm CMOS and 0.1um DRAM," IEEE International Solid-State Circuits Conference (ISSCC'10), Dig. Tech. Papers, pp. 436-437, Feb. 2010. |
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| 37 | M. Saito, N. Miura, and T. Kuroda, "A 2Gb/s 1.8pJ/b/chip Inductive-Coupling Through-Chip Bus for 128-Die NAND-Flash Memory Stacking," IEEE International Solid-State Circuits Conference (ISSCC'10), Dig. Tech. Papers, pp. 440-441, Feb. 2010. |
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| 36 | S. Kawai, H. Ishikuro, and T. Kuroda, "A 2.5Gb/s/ch Inductive-Coupling Transceiver for Non-Contact Memory Card," IEEE International Solid-State Circuits Conference (ISSCC'10), Dig. Tech. Papers, pp. 264-265, Feb. 2010. |
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| 35 | T. Kuroda, "Panel Discussion: The Semiconductor Industry in 2025," IEEE International Solid-State Circuits Conference (ISSCC'10), Dig. Tech. Papers, Feb. 2010. |
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| 34 | T. Kuroda, "Inductively Coupled Through-Chip Interface," IEEE International Solid-State Circuits Conference (ISSCC'10), Dig. Tech. Papers, Feb. 2010. |
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| 33 | R. Takashima, Y. Hanai, Y. Hori and T. Kuroda, "A Versatile Recognition Processor for Sensor Network Applications," 15th Asia and South Pacific Design Automation Conference (ASP-DAC'10), Proceedings, pp. 349-350, Jan. 2010. |
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| 32 | M. Saito, Y. Sugimori, Y. Kohama, Y. Yoshida, N. Miura, H. Ishikuro, T. Sakurai, and T. Kuroda, "2Gb/s 15pJ/b/chip Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking," IEEE Journal of Solid-State Circuits (JSSC), vol. 45, no. 1, pp. 134-141, Jan. 2010. |
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| 31 | Y. Hori, Y. Hanai, J. Nishimura and T. Kuroda, "Architecture Design of Versatile Recognition Processor for Sensornet Applications," IEEE Micro, vol. 29, no. 6, pp. 44-57, Nov./Dec. 2009. |
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| 30 | M. Saito, K. Kasuga, T. Takeya, N. Miura, and T. Kuroda, "An Extended XY Coil for Noise Reduction in Inductive-coupling Link," IEEE Asian Solid-State Circuits Conference (A-SSCC'09), Proc. Tech. Papers, pp. 305-308, Nov. 2009. |
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| 29 | Y. Chen, S. Tsukamoto, and T. Kuroda, "A 9b 100MS/s 1.46mW SAR ADC in 65nm CMOS," IEEE Asian Solid-State Circuits Conference (A-SSCC'09), Proc. Tech. Papers, pp. 145-148, Nov. 2009. |
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| 28 | K. Kasuga, M. Saito, T. Takeya, N. Miura, H. Ishikuro and T. Kuroda, "A Wafer Test Method of Inductive-Coupling Link," IEEE Asian Solid-State Circuits Conference (A-SSCC'09), Proc. Tech. Papers, pp. 301-304, Nov. 2009. |
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| 27 | L. Liu, M. Takamiya, T. Sekitani, Y. Noguchi, S. Nakano, K. Zaitsu, T.Kuroda, T. Someya, and T. Sakurai, "A 107-pJ/bit 100-kb/s 0.18-um Capacitive-Coupling Transceiver With Data Edge Signaling and DC Power-Free Pulse Detector for Printable Communication Sheet," IEEE Trans. On Circuits and Systems I, vol. 56, no. 11, pp. 2511-2518, Nov. 2009. |
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| 26 | Y. Hanai and T. Kuroda, "Face detection through compact classifier using adaptive look-up-table," IEEE International Conference on Image Processing (ICIP), pp. 1225-1228, Nov. 2009. |
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| 25 | M. Sato, H. Abe, M. Hamada, H. Majima, T. Kuroda, and H. Ishikuro, A 90nm CMOS Highly Linear Clock Bootstrapped RF Sampler Operating at Wide "Frequency Range of 0.5GHz to 5GHz," in Proc. 2009 IEEE Radio Frequency Integrated Circuits Symposium, Boston, MA, USA, June 7-9, 2009, pp.391-394 |
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| 24 | K. Niitsu, V. Kulkarni, K. Shinmo, H. Ishikuro, and T. Kuroda, "A 14GHz AC-Coupled Clock Distribution Using Single LC-VCO and Distributed Phase Interpolatorsk," International Conference on Solid State Devices and Materials, pp. 82-83, Oct. 2009. |
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| 23 | K.Kasuga, Y. Yuan, N. Miura, and T. Kuroda, "Electromagnetic Interference and Susceptibility in Inductive-Coupling Link," JSAP Solid State Devices and Materials (SSDM), Dig. Tech. Papers, pp. 62-63, Oct. 2009. |
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| 22 | T. Kuroda, "Low-Power 3D CMOS Integration," JSAP Solid State Devices and Materials (SSDM) Workshop, pp. 18-26, Oct. 2009. |
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| 21 | S.Saito, Y. Kohama, Y. Sugimori, Y. Hasegawa, H. Matsutani, T. Sano, K. Kasuga, Y. Yoshida, K. Niitsu, N. Miura, T. Kuroda, H. Amano, "MuCCRA-Cube: A 3D dynamically reconfigurable processor with inductive-coupling link," International Conference on Field Programmable Logic and Applications, pp. 6-11, Sep. 2009. |
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| 20 | T. Kuroda, "ThruChip Interface (TCI) for 3D System Integration," STMicroelectronics seminar, Sep. 2009. |
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| 19 | M. Saito, Y. Sugimori, Y. Kohama, Y. Yoshida, N. Miura, H. Ishikuro, and T. Kuroda, "47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking," IEEE Custom Integrated Circuits Conference (CICC'09), Dig. Tech. Papers, pp. 449-452, Sep. 2009. |
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| 18 | Y. Chen, X. Zhu, H. Tamura, M. Kibune, Y Tomita, T. Hamada, M. Yoshioka, K. Ishikawa, T. Takayama, J. Ogawa, S. Tsukamoto, and T. Kuroda, "Split Capacitor DAC Mismatch Calibration in Successive Approximation ADC," IEEE Custom Integrated Circuits Conference (CICC'09), Dig. Tech. Papers, pp. 279-282, Sep. 2009. |
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| 17 | 黒田忠広, "サブpJ/bのチップ間接続を実現する誘導結合通信," 第21回低消費電力・高速LSI技術懇談会 , Sep. 2009. |
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| 16 | T. Kuroda, "ThruChip Interface (TCI) for 3D System Integration," Intel seminar, Sep. 2009. |
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| 15 | T. Kuroda, "Is TSV 3D LSI’s and Packaging Finally Ready or Is It Just Another Fantasy?" IEEE Symposium on VLSI Circuits, Joint Runmp Session, Dig. Tech. Papers, p. 173, June 2009. |
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| 14 | T. Kuroda, "Wireless TSV for Low-Power 3D System Integration," IEEE Symposium on VLSI Circuits, Short Course Program Digest, pp. 77-106, June 2009. |
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| 13 | K. Osada, M. Saen, Y. Okuma, K. Niitsu, Y. Shimazaki, Y. Sugimori, Y. Kohama, K. Kasuga, I. Nonomura, N. Irie, T. Hattori, A. Hasegawa, and T. Kuroda, "3D System Integration of Processor and Multi-Stacked SRAMs by Using Inductive-Coupling Links," IEEE Symposium on VLSI Circuits, Dig. Tech. Papers, pp. 256-257, June 2009. |
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| 12 | Y. Kohama, Y. Sugimori, S. Saito, Y. Hasegawa, T. Sano, K. Kasuga, Y. Yoshida, K. Niitsu, N. Miura, H. Amano, and T. Kuroda, "A Scalable 3D Processor by Homogeneous Chip Stacking with Inductive-Coupling Link," IEEE Symposium on VLSI Circuits, Dig. Tech. Papers, pp. 94-95, June 2009. |
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| 11 | Y. Yuan, N. Miura, S. Imai, H. Ochi, and T. Kuroda, "Digital Rosetta Stone: A Sealed Permanent Memory with Inductive-Coupling Power and Data Link," IEEE Symposium on VLSI Circuits, Dig. Tech. Papers, pp. 26-27, June 2009. |
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| 10 | S. Kawai, H. Ishikuro, and T. Kuroda, "A 4.7 Gb/s Inductive Coupling Interposer with Dual Mode Modem," IEEE Symposium on VLSI Circuits, Dig. Tech. Papers, pp. 92-93, June 2009. |
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| 9 | 黒田忠広, "CPUとSRAMチップを誘導結合で三次元実装し,システムレベルの動作検証に成功," 電子情報通信学会誌, vol. 92, no. 6, pp. 472-473, June 2009. |
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| 8 | 黒田忠広, "無線で65チップを接続 SSDの体積を1/8へ," 日経エレクトロニクス6月号 , pp. 77-85, June 2009. |
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| 7 | 黒田忠広, "ワイヤレスTSVを用いた3次元集積," 最先端実装技術シンポジウム , pp. 62-74, June 2009. |
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| 6 | 春日一貴, 新津葵一, 黒田忠広, "誘導結合リンクを用いた90nmプロセッサと65nm SRAMの三次元システム集積," ICD LSIとシステムのワークショップ2009 , May 2009. |
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| 5 | 黒田忠広, "科学技術・研究開発の国際比較 2009年版," 科学技術振興機構 , pp. 12-13, May 2009. |
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| 4 | 黒田忠広, "パネル・ディスカッション TSVはどこまで低コスト化し普及するのか," ＴＳＶテクノロジ・コンファレンス2009 , pp. 75-80, Apr. 2009. |
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| 3 | 黒田忠広, "TSVを使わず無線で”コスト0”の3次元積層," ＴＳＶテクノロジ・コンファレンス2009 , pp. 47-74, Apr. 2009. |
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| 2 | 黒田忠広, "コストがほぼゼロの無線TSV まずはメモリーで実用化を狙う," 日経マイクロデバイス４月号 , pp. 34-37, Apr. 2009. |
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| 1 | Y. Hanai, Y. Hori, J. Nishimura, and T. Kuroda, "Architecture Design of Versatile Recognition Processor for Sensornet Applications," IEEE Symposium on Low-Power and High-Speed Chips COOLChips XII, Apr. 2009. |
