Papers(1994年度)
| 5 | K. Seta, H. Hara, T. Kuroda, M. Kakumu, and T. Sakurai, "50% Active Power Saving without Speed Degradation Using Standby Power Reduction (SPR) Circuit," IEEE International Solid-State Circuits Conference (ISSCC'95), Dig. Tech. Papers, pp. 318-319, Feb. 1995. |
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| 4 | T. Kuroda, T. Fujita, Y. Itabashi, S. Kabumoto, M. Noda, and A. Kanuma, "1.65Bb/s 60mW 4:1 Multiplexer and 1.8Gb/s 80mW 1:4 Demultiplexer ICs Using 2V 3-level Series Gating ECL Circuits," IEEE International Solid-State Circuits Conference (ISSCC'95), Dig. Tech. Papers, pp. 36-37, Feb. 1995. |
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| 3 | 黒田忠広, "ローパワーLSI設計技術の現状と動向," 日本工業技術センター, pp. 1-24, Nov. 1994. |
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| 2 | 黒田忠広, "ランダムロジック－パストランジスタロジック－," 日本工業技術センター, pp. 25-38, Nov. 1994. |
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| 1 | T. Kuroda, Y. Sakata, and K. Matsuo, "Analysis and optimization of BiCMOS gate circuits," IEEE Journal of Solid-State Circuits (JSSC), vol. 29, no. 5, pp. 564-571, May 1994. |
