Publication 発表

Papers(2003年度)

9 D. Mizoguchi, Y.Yusof, N. Miura, T. Sakurai, and T. Kuroda,
"A 1.2Gb/s/pin Wireless Superconnect Based on Inductive Inter-Chip Signaling,"
電気学会ULSIインターコネクト材料技術調査専門委員会, Mar. 2004.
8 D. Mizoguchi, Y.Yusof, N. Miura, T. Sakurai, and T. Kuroda,
"A 1.2Gb/s/pin Wireless Superconnect Based on Inductive Inter-Chip Signaling,"
ISSCC2004報告会, Mar. 2004.
7 D. Mizoguchi, Y. B. Yusof, N. Miura, T. Sakurai, and T. Kuroda,
"A 1.2Gb/s/pin Wireless Superconnect based on Inductive Inter-chip Signaling (IIS),"
IEEE International Solid-State Circuits Conference (ISSCC'04), Dig. Tech. Papers, pp. 142-143, Feb. 2004.		 pdf
6 N. Miura, N. Kato, and T. Kuroda,
"Practical methodology of post-layout gate sizing for 15% more power saving,"
in Proc. ACM Asia and South Pacific Design Automation Conference (ASPDAC'04), pp. 434-437, Jan. 2004. 		pdf
5

黒田忠広,
"{デバイス・実装・回路・システム} 総合設計,"
電子情報技術産業協会極限CMOS専門委員会, Nov. 2003.
4 S. Yoshizumi, T. Terada, J. Furukawa, Y. Sanada, and T. Kuroda,
"All Digital Transmitter Scheme and Transceiver Design for Pulse-Based Ultra-Wideband Radio,"
IEEE Ultra Wideband Systems and Technologies (UWBST’03), pp. 438-442, Nov. 2003.		 pdf
3 H. Tsuda, T. Nakahara, Y. Mizutani and T. Kuroda,
"High-speed on-chip and inter-chip optical interconnect technology for Tbit/s communication,"
the 87th OSA Annual Meeting, WI1, Oct. 5-9, 2003.		 pdf
2 T. Kuroda,
"10 Tips for Low Power CMOS Design,"
in Proc. ACM Design Automation Conference (DAC’03), tutorial, June 2003.		 pdf
1 神田 浩一,　ダナルドノ　ドゥイ アントノ,　石田 光一,　川口 博,　黒田 忠広,　桜井 貴康,
"1.27Gb/s/pin 3mW/pin Wireless Superconnect (WSC) Interface Scheme,"
電子情報通信学会 集積回路研究会, May 2003.